Many digital signal processors (DSP) architectures and other hardware accelerators applications may involve a series of multiplications and/or accumulations. Accordingly, a plurality of high-throughput multiply-accumulate (MAC) units may be used in order to achieve high performance.
Maximizing performance by using a plurality of MAC units simultaneously may result in high power dissipation. However, many applications today, for example, in the portable electronics market, require low power consumption. Thus, there is a need for multi-MAC architecture to achieve low power without sacrificing performance.
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